AS7C33128NTD32A
AS7C33128NTD32A is 3.3V 128K X 32/36 SRAM manufactured by Alliance Semiconductor.
Features
- Organization: 131,072 words × 32 or 36 bits NTD™1 architecture for efficient bus operation
- Fast clock speeds to 166 MHz in LVTTL/LVCMOS
- Fast clock to data access: 3.5/4.0/5.0 ns
- Fast OE access time: 3.5/4.0/5.0 ns
- Fully synchronous operation
- Flow-through or pipelined mode
- Asynchronous output enable control
1. NTD™ is a trademark of Alliance Semiconductor Corporation.
Logic block diagram
- Economical 100-pin TQFP package
- Byte write enables
- Clock enable for operation hold
- Multiple chip enables for easy expansion
- 3.3V core power supply
- 2.5V or 3.3V I/O operation with separate VDDQ
- 30 m W typical standby power
- Self-timed write cycles
- Interleaved or linear burst modes
- Snooze mode for standby operation
Pin arrangement for TQFP (top view)
A A CE0 CE1 BWd BWc BWb BWa CE2 VDD VSS CLK R/W CEN OE ADV/LD NC NC A A
A[16:0]
CE0 CE1 CE2
R/W BWa BWb BWc BWd ADV / LD
FT LBO
DQ [a:d]
32/36
D Aredgdirsetessr Q Burst logic
Control logic
Data Input
Register...
